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ALPHACHIPS

系统半导体

Design Service事业领域

ONE-STOP TURN-KEY SERVICE

SoC Team

Level 0 Design

  • - System architecture design
  • - IP block design & verification
  • - Full chip design & verification
  • - Multiple FPGA Architecture design/verification
  • - Fast, more efficient SoC design flow
  • - System performance analysis / optimization
Design Service Team

Full Chip Design

  • - Physical Verification
  • - ARM hardening design
  • - Frontend / Backend Design
  • - Technology based Chip Design
FA Team

Design Start ~ Mass Production

  • - Package Design Solution
  • - EDS + Final Test Set-up
  • - Mass Production Support (Yield Analysis / Management)
  • - Customer Quality Service
  • - CS/Conner Sample verification support
  • - PI/SI Simulation verification support
IP Release

Level 0 Design

  • - ARM Cortex-A, CoreSight, NIC Bus
  • - Synopsys LPDDR4, USB2, USB3, GMAC
  • - Analog IP, HSI IP

BUSINESS SCOPE

  • Connected Car

  • AI

  • AR / VR

  • Security

  • Sensor

  • Mobile

FOUNDRY BIZ. OVERVIEW

OUR STRENGTHS

Status Of Technology

Key technologies from product planning and design to field verification
and customer support

  • Full Chip Design

    Product planning
    and design

    - System Architecture Analysis

    - Power Management Control

    - Diagnostic Analysis System

    - System Bus Optimization

    - System Driver & Software

    - Multiple FPGA Architecture Design

  • Front-End Design

    Circuit synthesis
    and analysis

    - Design Feasibility & Physical based Synthesis

    - DFT (SCAN/MBIS/LBIST/IP/JTAG)

    - STA (Static Timing Analysis)

    - Lower Power Design

    - Reliability Rule Check Design

    - Package Design Check

  • Back-End Design

    Auto layout

    - Floorplan, Auto P&R

    - Timing Driven Layout

    - Hierarchical Physical Design Layout

    - Lower Power & Multi Power Design

    - IR Drop, IVD, DFM Check & Cross-talk Noise Analysis

    - Physical Verification

  • FMP & Field Application

    Package & Test Develop

    - Full Turn-Key Solution (Wafer + EDS + PKG + Final Test)

    - Test Vector Generation

    - Yield Improvement

    - Field Application Analysis

    - Qualification & Reliability

  • 3rd Party IP

    IP Support

    - Alpha SOC Platform Design

    - 3rd Party IP

    - ARM : Cortex-A/R/M, CoreSight, NIC Bus

    - Synopsys : DDR4, LPD, DR4, USB2/3, GMAC

CONTACT

TEL. 031-608-0800

E-MAIL. foundry@alphachips.co.kr